Glenn Wurster
Abstract.
In an effort to protect programs against tampering, there have been several recent papers on self-checking tamper resistance. This form of tamper resistance relies on the checksumming of code contained within a program in an e ort to detect even small deviations from original functionality. Processors, however, are complex devices. An oversimplified view of the memory management unit of a modern processor can lead to incorrect assumptions about the security of self-checking tamper resistance. This simplistic view has it s faults in the assumption that the data at memory address x remains constant between an instruction fetch and a data read. By examining processor architecture, we can explore this lack of connection between a processor reading from an address x and executing from address x. The memory management unit of a processor will be examined, along with the associated access controls. Through examination of the memory management unit, we will explore the possibility for a disconnect between a read of data and an execute of code contained at x.